1. Field of Invention
The present invention relates to a CMOS sense structure. More particularly, the present invention relates to a CMOS sense structure having a silicon dioxide outer ring around the sense region for lowering surface leakage and edge junction leakage.
2. Description of Related Art
FIG. 1 is a schematic cross-sectional side view of a conventional CMOS sense structure. As shown in FIG. 1, the CMOS sense structure includes a substrate 10, a n.sup.+ region 12, a n.sup.- region 14, isolation regions 16 and field implant regions 18. The substrate 10 can be a P-type substrate (or a P-well), for example. The n.sup.+ region 12 and the n.sup.- region 14 are formed by implanting identical ions, but with different concentrations, into the substrate 10. The concentration of ions inside the n.sup.+ region is higher than the concentration of ions inside the n.sup.- region. The n.sup.+ region 12 and the n.sup.- region 14 together form the diode in the sense region. The isolation region 16 and the field implant region 18 on each side of the sense region are used for isolating device regions (not shown in the figure).
Because etching is conducted in the process of forming spacers or polysilicon gates in the device regions, the depletion region 22 near the edge of the sense region may be etched, leading to surface damages. Consequently, a large dark current may form on the surface of the sense region. The dark current is referred to as surface leakage. An excessive surface leak may result in poor image quality.